description the accutek ak48256 high density memory modules is a random access memory organized in 256k x 8 bit words. the assembly consists of eight standard 256 k x 1 drams in plastic leaded chip carriers (plcc) mounted on the front side of a printed circuit board. the module can be configured as a leadless 30 pad sim or a leaded 30 pin sip. this packaging approach provides a 6 to 1 density in - crease over standard dip packaging. the operation of the ak48256 is identical to eight 256 k x 1 drams. the data input is tied to the data output and brought out separately for each device, with common ras , cas and we control. this common i/o feature dictates the use of early-write cycles to prevent contention of d and q. since the write-enable (we ) signal must al - ways go low before cas in a write cycle, read-write and read-modify-write operation is not possible. features 262,144 by 8 bit organization optional 30 pad leadless sim (single in-line module) or 30 pin leaded sip (single in-line package) jedec standard pinout each device has common d and q lines with common ras , cas and we control 2.8 watt active and 180 mw standby (max) operating free air temperature 0 0 cto70 0 c upward compatible with ak481024, ak581024, ak584096 and ak5816384 functionally and pin compatible with ak58256a accutek microcircuit corporation ak48256s / ak48256g 262,144 x 8 bit mos dynamic random access memory 1 30 1 front view 30-pin sim 30-pin sip pin nomenclature a 0 -a 8 address inputs dq 1 -dq 8 data in / data out cas column address strobe ras row address strobe we write enable vcc 5v supply vss ground nc no connect module options leadless sim: ak48256s leaded sip: ak48256g pin assignment pin # symbol pin # symbol 1 vcc 16 dq5 2 cas 17 a8 3 dq! 18 nc 4a019nc 5 a1 20 dq6 6 dq2 21 we 7 a2 22 vss 8 a3 23 dq7 9 vss 24 nc 10 dq3 25 dq8 11 a4 26 nc 12 a5 27 ras 13 dq4 28 nc 14 a6 29 nc 15 a7 30 vcc functional diagram
ordering information part number coding interpretation position 12345678 1 product ak = accutek memory 2 type 4 = dynamic ram 5 = cmos dynamic ram 6 = static ram 3 organization/word width 1 = by 1 16 = by 16 4 = by 4 32 = by 32 8 = by 8 36 = by 36 9 = by 9 4 size/bits depth 64 = 64k 4096 = 4 meg 256 = 256k 8192 = 8 meg 1024 = 1 meg 16384 = 16 meg 5 package type g = single in-line package (sip) s = single in-line module (sim) d = dual in-line package (dip) w = .050 inch pitch edge connect z = zig-zag in-line package (zip) 6 special designation p = page mode n = nibble mode k = static column mode w = write per bit mode v = video ram 7 separator - = commercial 0 0 cto+70 0 c m = military equivalent screened (-55 0 c to +125 0 c) i = industrial temperature tested (-45 0 cto+85 0 c) x = burned in 8 speed (first two significant digits) drams srams 50 = 50 ns 8 = 8 ns 60 = 60 ns 10 = 10 ns 70 = 70 ns 12 = 12 ns 80 = 80 ns 15 = 15 ns 1 30 3.525 3.475 0.100 typ 0.325 0.275 0.100 t. p. 3.100 3.090 0.024 0.016 0.425 0.375 .100 .060 0.685 0.635 1 0.685 0.635 0.100 typ 0.100 typ 0.200" max 0.053 0.047 accutek microcircuit corporation business center at newburyport 2 new pasture road, suite 1 newburyport, ma 01950-4054 voice: 978-465-6200 fax: 978-462-3396 email: sales@accutekmicro.com internet: www.accutekmicro.com accutek reserves the right to make changes in specifications at any time and without notice. accutek does not assume any responsibil - ity for the use of any circuitry described; no circuit patent licenses are implied. preliminary data sheets contain minimum and maxi - mum limits based upon design objectives, which are subject to change upon full characterization over the specific operating condi - tions. mechanical dimensions inches the numbers and coding on this page do not include all variations available but are show as examples of the most widely used variations. contact accutek if other information is required. examples: ak48256sp-10 256k x 8, 100 nsec dram 30 pin sim configuration, page mode ak48256gk-80 256k x 8, 80 nsec dram 30 pin sip configuration, static column mode
|
